Cypress Semiconductor CY7C1330AV25 Spécifications télécharger pdf (Page 10)

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CY7C1330AV25

CY7C1332AV25

Document No: 001-07844 Rev. *A Page 10 of 19

Capture Hold after Clock Rise 5 ns

Output Times

TDOV

TCK Clock LOW to TDO Valid 10 ns

TDOX

TCK Clock LOW to TDO Invalid 0 ns

TAP Timing and Test Conditions

[11]

TAP AC Switching Characteristics Over the Operating Range (continued)

[10, 11]

Parameter Description Min. Max. Unit

(a)

TDO

= 20 pF

= 50Ω

GND

1.25V

50Ω

2.5V

ALL INPUT PULSES

1.25V

Test Clock

Test Mode Select

TCK

TMS

Test Data-In

TDI

Test Data-Out

TCYC

TMSH

TMSS

TDIS

TDIH

TDOV

TDOX

TDO

Identification Register Definitions

Instruction Field

Value

DescriptionCY7C1330AV25 CY7C1332AV25

Revision Number (31:29) 000 000 Version number.

Cypress Device ID (28:12) 01011110101100101 01011110101010101 Defines the type of SRAM.

Cypress JEDEC ID (11:1) 00000110100 00000110100 Allows unique identification of SRAM vendor.

ID Register Presence (0) 1 1 Indicates the presence of an ID register.

[+] Feedback

1 2 ... 5 6 7 8 9 10 11 12 13 14 15 ... 18 19

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Cypress Semiconductor CY7C1330AV25 Spécifications Page 10

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