Cypress Semiconductor CY7C1364C Manuel d'utilisateur télécharger pdf (Page 16)

CY7C1360V25

CY7C1362V25

CY7C1364V25

PRELIMINARY

TAP AC Switching Characteristics

Over the Operating Range

[6, 7]

Parameters Description Min. Max. Unit

TCYC

TCK Clock Cycle Time 100 ns

TCK Clock Frequency 10 MHz

TCK Clock HIGH 40 ns

TCK Clock LOW 40 ns

Set-up Times

TMSS

TMS Set-up to TCK Clock Rise 10 ns

TDIS

TDI Set-up to TCK Clock Rise 10 ns

Capture Set-up to TCK Rise 10 ns

Hold Times

TMSH

TMS Hold after TCK Clock Rise 10 ns

TDIH

TDI Hold after Clock Rise 10 ns

Capture Hold after Clock Rise 10 ns

Output Times

TDOV

TCK Clock LOW to TDO Valid 20 ns

TDOX

TCK Clock LOW to TDO Invalid 0 ns

Notes:

6. t

and t

refer to the set-up and hold time requirements of latching data from the boundary scan register.

7. Test conditions are specified using the load in TAP AC test conditions. t

= 1 ns.

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Cypress Semiconductor CY7C1364C Manuel d'utilisateur Page 16