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I2C Bootloader

Document Number: 001-13258 Rev. *J Page 3 of 39

Functional Description

The bootloader is located in a section of Flash memory defined by you (using user module parameters).

This memory space is (must be) write-protected to prevent any accidental modification or corruption. The

reset vector is modified so that when the processor is reset, the bootloader is executed.

The following operations are carried out by the bootloader:

1. When reset, the bootloader calculates a checksum for the Flash user code and verifies it with a check-

sum written to the last two bytes of Flash memory. If the checksum matches, the previous program-

ming attempt has been successful and the bootloader branches to the beginning of the user code and

the user code can execute.

2. If the checksum does not match, the bootloader executes customizable user code to perform system

critical tasks (such as turning on a fan) and then enters the bootloader mode, where it waits for a 8-

byte bootloader key from the master. If the previous bootloading has failed (for example, if there was a

power transient), the program enters the bootloader mode due to a checksum mismatch.

3. When the bootloader receives a valid bootloader key from the master, it responds with a status byte

informing the master that it is ready to receive the Flash image.

4. The master sends the updated user code in 64-byte packets with some encoding bytes.

5. The bootloader writes the user code to the Flash. When all the Flash pages are written successfully,

the bootloader performs a Flash verify operation and then a software reset to start the user code.

Note The I

C master must wait 100 ms after each block write, before reading the block status byte to

allow the Flash block write operation.

The bootloader portion of the user module gives a method to organize the memory map and major code

functional blocks into areas that are compatible with device reprogramming. The memory organization of

the project is considerably different from that of a conventional PSoC Designer project. Modifications to

the memory map are necessary to meet the minimum device functionality requirements while the device

application is being reprogrammed. Effectively, a project incorporating a bootloader contains two

independent programs supporting different functions. Figure 2 shows the Bootloader memory

organization.

After a project incorporating a bootloader is deployed, the memory locations highlighted in gray are never

reprogrammed. The memory locations highlighted in green may be altered by running the bootloader.

I2C and Sleep

Special care must be taken when using I2C with a project that goes to a sleep state. Before the project

enters a sleep state, follow these steps for proper sleep entry and I2C handling:

1. Ensure that all I2C traffic is complete.

2. Disable the I2C by calling the Stop API.

3. Configure the I2C pins to a analog High-Z drive mode.

Follow these steps when the part wakes from sleep:

1. Ensure that there is no active I2C traffic.

2. Enable the I2C by calling the Start API.

3. Configure the I2C pins to Open-Drain Drives Low drive mode.

4. Enable Interrupts.

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