CY14B256KA256-Kbit (32 K × 8) nvSRAM withReal Time ClockCypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-260
CY14B256KADocument Number: 001-55720 Rev. *H Page 10 of 28RTC External ComponentsThe RTC requires connecting an external 32.768 kHz crystal and C1, C
CY14B256KADocument Number: 001-55720 Rev. *H Page 11 of 28PCB Design Considerations for RTCRTC crystal oscillator is a low current circuit with high
CY14B256KADocument Number: 001-55720 Rev. *H Page 12 of 28Table 3. RTC Register Map [6, 7]Register BCD Format Data [6]Function/RangeCY14B256KA D7 D6
CY14B256KADocument Number: 001-55720 Rev. *H Page 13 of 28Table 4. Register Map DetailRegisterDescriptionCY14B256KA0x7FFFTime Keeping - YearsD7 D6 D
CY14B256KADocument Number: 001-55720 Rev. *H Page 14 of 28RegisterDescriptionCY14B256KA0x7FF8Calibration/ControlD7 D6 D5 D4 D3 D2 D1 D0OSCEN 0 Calibr
CY14B256KADocument Number: 001-55720 Rev. *H Page 15 of 28RegisterDescriptionCY14B256KA0x7FF4Alarm - HoursD7 D6 D5 D4 D3 D2 D1 D0M 0 10s alarm hours
CY14B256KADocument Number: 001-55720 Rev. *H Page 16 of 28Maximum RatingsExceeding maximum ratings may shorten the useful life of thedevice. These us
CY14B256KADocument Number: 001-55720 Rev. *H Page 17 of 28VCAP[12]Storage capacitor Between VCAP pin and VSS61 68 180 µFVVCAP[13, 14]Maximum voltage
CY14B256KADocument Number: 001-55720 Rev. *H Page 18 of 28AC Test ConditionsInput pulse levels ...0 V
CY14B256KADocument Number: 001-55720 Rev. *H Page 19 of 28AC Switching CharacteristicsOver the Operating RangeParameters [18]Description25 ns 45 nsUn
CY14B256KADocument Number: 001-55720 Rev. *H Page 2 of 28ContentsPinouts ...
CY14B256KADocument Number: 001-55720 Rev. *H Page 20 of 28Figure 9. SRAM Read Cycle #2 (CE and OE Controlled) [25, 26]Figure 10. SRAM Write Cycle #
CY14B256KADocument Number: 001-55720 Rev. *H Page 21 of 28AutoStore/Power-Up RECALLOver the Operating RangeParameter Description Min Max UnittHRECALL
CY14B256KADocument Number: 001-55720 Rev. *H Page 22 of 28Software Controlled STORE/RECALL CycleOver the Operating RangeParameter [35, 36]Description
CY14B256KADocument Number: 001-55720 Rev. *H Page 23 of 28Hardware STORE CycleOver the Operating RangeParameter Description Min Max UnittDHSBHSB to o
CY14B256KADocument Number: 001-55720 Rev. *H Page 24 of 28Ordering Code DefinitionsTruth Table For SRAM OperationsHSB must remain HIGH for SRAM opera
CY14B256KADocument Number: 001-55720 Rev. *H Page 25 of 28Package DiagramFigure 17. 48-pin SSOP (300 Mils) Package Outline, 51-8506151-85061 *F
CY14B256KADocument Number: 001-55720 Rev. *H Page 26 of 28Acronyms Document ConventionsUnits of MeasureAcronym DescriptionBCD Binary Coded DecimalCEC
CY14B256KADocument Number: 001-55720 Rev. *H Page 27 of 28Document History PageDocument Title: CY14B256KA, 256-Kbit (32 K × 8) nvSRAM with Real Time
Document Number: 001-55720 Rev. *H Revised July 3, 2013 Page 28 of 28All products and company names mentioned in this document may be the trademarks
CY14B256KADocument Number: 001-55720 Rev. *H Page 3 of 28PinoutsFigure 1. 48-pin SSOP pinoutNCA8XoutXinVSSDQ6DQ5DQ4VCCA13DQ3A12DQ2DQ1DQ0OEA9CENCA0A1
CY14B256KADocument Number: 001-55720 Rev. *H Page 4 of 28Device OperationThe CY14B256KA nvSRAM is made up of two functionalcomponents paired in the s
CY14B256KADocument Number: 001-55720 Rev. *H Page 5 of 28it only when the STORE is complete. Upon completion of theSTORE operation, the nvSRAM memory
CY14B256KADocument Number: 001-55720 Rev. *H Page 6 of 28Preventing AutoStoreThe AutoStore function is disabled by initiating an AutoStoredisable seq
CY14B256KADocument Number: 001-55720 Rev. *H Page 7 of 28Real Time Clock OperationnvTIME OperationThe CY14B256KA offers internal registers that conta
CY14B256KADocument Number: 001-55720 Rev. *H Page 8 of 28within the first 5 ms, the OSCF bit is set to ‘1’. The system mustcheck for this condition a
CY14B256KADocument Number: 001-55720 Rev. *H Page 9 of 28interrupt on INT pin is also generated on watchdog timeout. Theflag and the hardware interru
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