Cypress Semiconductor Perform nvSRAM Spécifications

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CY14B256KA
256-Kbit (32 K × 8) nvSRAM with
Real Time Clock
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document Number: 001-55720 Rev. *H Revised July 3, 2013
256-Kbit (32 K × 8) nvSRAM with Real Time Clock
Features
256-Kbit nonvolatile static random access memory (nvSRAM)
25 ns and 45 ns access times
Internally organized as 32 K × 8 (CY14B256KA)
Hands off automatic STORE on power-down with only a small
capacitor
STORE to QuantumTrap nonvolatile elements is initiated by
software, hardware, or AutoStore on power-down
RECALL to SRAM initiated on power-up or by software
High reliability
Infinite Read, Write, and RECALL cycles
1 million STORE cycles to QuantumTrap
20 year data retention
Real time clock (RTC)
Full-featured real time clock
Watchdog timer
Clock alarm with programmable interrupts
Capacitor or battery backup for RTC
Backup current of 0.35 µA (Typ)
Industry standard configurations
Single 3 V +20%, –10% operation
Industrial temperature
48-pin shrink small-outline package (SSOP)
Pb-free and Restriction of hazardous substances (RoHS)
compliant
Functional Description
The Cypress CY14B256KA combines a 256-Kbit nonvolatile
static RAM with a full featured real time clock in a monolithic
integrated circuit. The embedded nonvolatile elements
incorporate QuantumTrap technology producing the world’s
most reliable nonvolatile memory. The SRAM is read and written
an infinite number of times, while independent nonvolatile data
resides in the nonvolatile elements.
The real time clock function provides an accurate clock with leap
year tracking and a programmable, high accuracy oscillator. The
alarm function is programmable for periodic minutes, hours,
days, or months alarms. There is also a programmable watchdog
timer for process control.
STORE/
RECALL
CONTROL
POWER
CONTROL
SOFTWARE
DETECT
STATIC RAM
ARRAY
512 X 512
QuantumTrap
512 X 512
STORE
RECALL
COLUMN IO
COLUMN DEC
ROW DECODER
INPUT BUFFERS
OE
CE
WE
HSB
V
CC
V
CAP
A
14
-
A
0
A
0
A
1
A
2
A
3
A
4
A
10
A
5
A
6
A
7
A
8
A
9
A
12
A
13
A
14
DQ
0
DQ
1
DQ
2
DQ
3
DQ
4
DQ
5
DQ
6
DQ
7
RTC
MUX
A
14
-
A
0
x
out
x
in
INT
V
RTCbat
V
RTCcap
A
11
Logic Block Diagram
Logic Block Diagram
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Résumé du contenu

Page 1 - Real Time Clock

CY14B256KA256-Kbit (32 K × 8) nvSRAM withReal Time ClockCypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-260

Page 2

CY14B256KADocument Number: 001-55720 Rev. *H Page 10 of 28RTC External ComponentsThe RTC requires connecting an external 32.768 kHz crystal and C1, C

Page 3

CY14B256KADocument Number: 001-55720 Rev. *H Page 11 of 28PCB Design Considerations for RTCRTC crystal oscillator is a low current circuit with high

Page 4

CY14B256KADocument Number: 001-55720 Rev. *H Page 12 of 28Table 3. RTC Register Map [6, 7]Register BCD Format Data [6]Function/RangeCY14B256KA D7 D6

Page 5

CY14B256KADocument Number: 001-55720 Rev. *H Page 13 of 28Table 4. Register Map DetailRegisterDescriptionCY14B256KA0x7FFFTime Keeping - YearsD7 D6 D

Page 6

CY14B256KADocument Number: 001-55720 Rev. *H Page 14 of 28RegisterDescriptionCY14B256KA0x7FF8Calibration/ControlD7 D6 D5 D4 D3 D2 D1 D0OSCEN 0 Calibr

Page 7

CY14B256KADocument Number: 001-55720 Rev. *H Page 15 of 28RegisterDescriptionCY14B256KA0x7FF4Alarm - HoursD7 D6 D5 D4 D3 D2 D1 D0M 0 10s alarm hours

Page 8 - Watchdog Timer

CY14B256KADocument Number: 001-55720 Rev. *H Page 16 of 28Maximum RatingsExceeding maximum ratings may shorten the useful life of thedevice. These us

Page 9

CY14B256KADocument Number: 001-55720 Rev. *H Page 17 of 28VCAP[12]Storage capacitor Between VCAP pin and VSS61 68 180 µFVVCAP[13, 14]Maximum voltage

Page 10 - CY14B256KA

CY14B256KADocument Number: 001-55720 Rev. *H Page 18 of 28AC Test ConditionsInput pulse levels ...0 V

Page 11

CY14B256KADocument Number: 001-55720 Rev. *H Page 19 of 28AC Switching CharacteristicsOver the Operating RangeParameters [18]Description25 ns 45 nsUn

Page 12

CY14B256KADocument Number: 001-55720 Rev. *H Page 2 of 28ContentsPinouts ...

Page 13

CY14B256KADocument Number: 001-55720 Rev. *H Page 20 of 28Figure 9. SRAM Read Cycle #2 (CE and OE Controlled) [25, 26]Figure 10. SRAM Write Cycle #

Page 14

CY14B256KADocument Number: 001-55720 Rev. *H Page 21 of 28AutoStore/Power-Up RECALLOver the Operating RangeParameter Description Min Max UnittHRECALL

Page 15

CY14B256KADocument Number: 001-55720 Rev. *H Page 22 of 28Software Controlled STORE/RECALL CycleOver the Operating RangeParameter [35, 36]Description

Page 16

CY14B256KADocument Number: 001-55720 Rev. *H Page 23 of 28Hardware STORE CycleOver the Operating RangeParameter Description Min Max UnittDHSBHSB to o

Page 17

CY14B256KADocument Number: 001-55720 Rev. *H Page 24 of 28Ordering Code DefinitionsTruth Table For SRAM OperationsHSB must remain HIGH for SRAM opera

Page 18

CY14B256KADocument Number: 001-55720 Rev. *H Page 25 of 28Package DiagramFigure 17. 48-pin SSOP (300 Mils) Package Outline, 51-8506151-85061 *F

Page 19

CY14B256KADocument Number: 001-55720 Rev. *H Page 26 of 28Acronyms Document ConventionsUnits of MeasureAcronym DescriptionBCD Binary Coded DecimalCEC

Page 20 - [26, 27, 28]

CY14B256KADocument Number: 001-55720 Rev. *H Page 27 of 28Document History PageDocument Title: CY14B256KA, 256-Kbit (32 K × 8) nvSRAM with Real Time

Page 21

Document Number: 001-55720 Rev. *H Revised July 3, 2013 Page 28 of 28All products and company names mentioned in this document may be the trademarks

Page 22

CY14B256KADocument Number: 001-55720 Rev. *H Page 3 of 28PinoutsFigure 1. 48-pin SSOP pinoutNCA8XoutXinVSSDQ6DQ5DQ4VCCA13DQ3A12DQ2DQ1DQ0OEA9CENCA0A1

Page 23 - [41, 42]

CY14B256KADocument Number: 001-55720 Rev. *H Page 4 of 28Device OperationThe CY14B256KA nvSRAM is made up of two functionalcomponents paired in the s

Page 24

CY14B256KADocument Number: 001-55720 Rev. *H Page 5 of 28it only when the STORE is complete. Upon completion of theSTORE operation, the nvSRAM memory

Page 25

CY14B256KADocument Number: 001-55720 Rev. *H Page 6 of 28Preventing AutoStoreThe AutoStore function is disabled by initiating an AutoStoredisable seq

Page 26 - Units of Measure

CY14B256KADocument Number: 001-55720 Rev. *H Page 7 of 28Real Time Clock OperationnvTIME OperationThe CY14B256KA offers internal registers that conta

Page 27

CY14B256KADocument Number: 001-55720 Rev. *H Page 8 of 28within the first 5 ms, the OSCF bit is set to ‘1’. The system mustcheck for this condition a

Page 28

CY14B256KADocument Number: 001-55720 Rev. *H Page 9 of 28interrupt on INT pin is also generated on watchdog timeout. Theflag and the hardware interru

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