Cypress Semiconductor FX2LP Manuel d'utilisateur télécharger pdf (Page 2)

CY7C68013A/CY7C68014A

CY7C68015A/CY7C68016A

Document #: 38-08032 Rev. *K Page 2 of 60

1.1 Features (CY7C68013A/14A only)

• CY7C68014A: Ideal for battery powered applications

— Suspend current: 100 µA (typ)

• CY7C68013A: Ideal for non-battery powered applica-

tions

— Suspend current: 300 µA (typ)

• Available in five lead-free packages with up to 40 GPIOs

— 128-pin TQFP (40 GPIOs), 100-pin TQFP (40 GPIOs),

56-pin QFN (24 GPIOs), 56-pin SSOP (24 GPIOs), and

56-pin VFBGA (24 GPIOs)

1.2 Features (CY7C68015A/16A only)

• CY7C68016A: Ideal for battery powered applications

— Suspend current: 100 µA (typ)

• CY7C68015A: Ideal for non-battery powered applica-

tions

— Suspend current: 300 µA (typ)

• Available in lead-free 56-pin QFN package (26 GPIOs)

— 2 more GPIOs than CY7C68013A/14A enabling addi-

tional features in same footprint

Cypress Semiconductor Corporation’s (Cypress’s) EZ-USB

FX2LP™ (CY7C68013A/14A) is a low-power version of the

EZ-USB FX2™ (CY7C68013), which is a highly integrated,

low-power USB 2.0 microcontroller. By integrating the USB 2.0

transceiver, serial interface engine (SIE), enhanced 8051

microcontroller, and a programmable peripheral interface in a

single chip, Cypress has created a very cost-effective solution

that provides superior time-to-market advantages with low

power to enable bus powered applications.

The ingenious architecture of FX2LP results in data transfer

rates of over 53 Mbytes per second, the maximum-allowable

USB 2.0 bandwidth, while still using a low-cost 8051 microcon-

troller in a package as small as a 56 VFBGA (5mm x 5mm).

Because it incorporates the USB 2.0 transceiver, the FX2LP is

more economical, providing a smaller footprint solution than

USB 2.0 SIE or external transceiver implementations. With

EZ-USB FX2LP, the Cypress Smart SIE handles most of the

USB 1.1 and 2.0 protocol in hardware, freeing the embedded

microcontroller for application-specific functions and

decreasing development time to ensure USB compatibility.

The General Programmable Interface (GPIF) and

Master/Slave Endpoint FIFO (8- or 16-bit data bus) provides

an easy and glueless interface to popular interfaces such as

ATA, UTOPIA, EPP, PCMCIA, and most DSP/processors.

The FX2LP draws considerably less current than the FX2

(CY7C68013), has double the on-chip code/data RAM and is

fit, form and function compatible with the 56-, 100-, and

128-pin FX2.

Five packages are defined for the family: 56VFBGA, 56 SSOP,

56 QFN, 100 TQFP, and 128 TQFP.

2.0 Applications

• Portable video recorder

• MPEG/TV conversion

• DSL modems

• ATA interface

• Memory card readers

• Legacy conversion devices

• Cameras

• Scanners

• Home PNA

• Wireless LAN

• MP3 players

• Networking

The “Reference Designs” section of the Cypress web site

provides additional tools for typical USB 2.0 applications. Each

reference design comes complete with firmware source and

object code, schematics, and documentation. Please visit

http://www.cypress.com for more information.

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