Cypress Semiconductor CYV15G0404DXB Guide de l'utilisateur Page 29

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CYV15G0404DXB Evaluation Board
Users Guide
Page 29 of 56
Steps 10 through 12 are for result verification of the BIST on channel A:
11.Verify that the LFIA
and LFIB LEDs turn off.
12.Connect a probe from the oscilloscope to RXSTA1 and verify that RXSTA1 signal has pulses of approximately 8.0-ns width
and 4.2-µs period.
13.Verify that RXSTA2 remains low to indicate that there are no BIST errors.
Table 7-7. Device Control Latch Configuration for Bist on Channel A
ADDR Chnl Type DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 Reset Value
0
(0000b)
AS
RFMODE
A[1] = ‘1’
RFMODE
A[0] =’0
FRAMCHAR
A = ‘1’
DECMODE
A = ‘1’
DECBYP
A = ‘1’
RXCKSEL
A = ‘1’
RXRATE
A = ‘1’
GLEN0
= ‘1’
10111111
1
(0001b)
AS
SDASEL2
A[1] = ‘1’
SDASEL2
A[0] = ‘0’
SDASEL1
A[1] = ‘1’
SDASEL1
A[0] = ‘0’
ENCBYP
A = ‘1’
TXCKSEL
A = ‘1’
TXRATE
A =’0’
GLEN1
= ‘1’
10101101
2
(0010b)
AD
RFEN
A = ‘1’
RXPLLPD
A = ‘1’
RXBIST
A = ‘0’
TXBIST
A = ‘0’
OE2
A = ‘1’
OE1
A = ‘1’
PABRST
A = ‘0’
GLEN2
= ‘1’
10110011
5
(0101b)
BDRFEN
B = ‘0’
RXPLLPD
B = ‘1’
RXBIST
B = ‘1’
TXBIST
B = ‘1’
OE2
B = ‘1’
OE1
B = ‘1’
PABRST
B = ‘0’
GLEN5
= ‘1’
10110011
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