Cypress Semiconductor FX2LP Manuel d'utilisateur télécharger pdf (Page 45)

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10.9 Slave FIFO Synchronous Write

SFD

FDH

DATA

IFCLK

SLWR

FLAGS

WRH

XFLG

IFCLK

SWR

Figure 10-9. Slave FIFO Synchronous Write Timing Diagram

[20]

Table 10-9. Slave FIFO Synchronous Write Parameters with Internally Sourced IFCLK

[21]

Parameter Description Min. Max. Unit

IFCLK

IFCLK Period 20.83 ns

SWR

SLWR to Clock Set-up Time 18.1 ns

WRH

Clock to SLWR Hold Time 0 ns

SFD

FIFO Data to Clock Set-up Time 9.2 ns

FDH

Clock to FIFO Data Hold Time 0 ns

XFLG

Clock to FLAGS Output Propagation Time 9.5 ns

Table 10-10. Slave FIFO Synchronous Write Parameters with Externally Sourced IFCLK

[21]

Parameter Description Min. Max. Unit

IFCLK

IFCLK Period 20.83 200 ns

SWR

SLWR to Clock Set-up Time 12.1 ns

WRH

Clock to SLWR Hold Time 3.6 ns

SFD

FIFO Data to Clock Set-up Time 3.2 ns

FDH

Clock to FIFO Data Hold Time 4.5 ns

XFLG

Clock to FLAGS Output Propagation Time 13.5 ns

1 2 ... 40 41 42 43 44 45 46 47 48 49 50 ... 59 60

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Cypress Semiconductor FX2LP Manuel d'utilisateur Page 45

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