Cypress Semiconductor Perform CY7C1372D Guide de l'utilisateur télécharger pdf (Page 65)

Note that the map report file shows that the 2M device for example uses 57% of the slices, but

42% of the flip-flops so the logic is loosely packed. Also, notice that the peak memory used is

414MB so be sure your computer has enough RAM to fit this design efficiently.

The map report also shows how the area constraints were utilized so that they can be reviewed

for the proper size.

It is expected that your logic design may not use all the components or features provides, so you

can use the area constraint reports to estimate usage for the ones you will use.

Innovative Integration FrameWork Logic User Guide 65

Design Information

------------------

Command Line : C:/Xilinx/bin/nt/map.exe -ise

c:\projects\cquixote\logic\intf\rev2\amit\quixote_intf_c.ise -intstyle ise -p

xc2v2000-ff896-4 -cm speed -gf quixote_intf_map.ncd -gm incremental

-ignore_keep_hierarchy -pr b -k 4 -c 100 -tx off -o quixote_intf_map.ncd

quixote_intf.ngd quixote_intf.pcf

Target Device : xc2v2000

Target Package : ff896

Target Speed : -4

Mapper Version : virtex2 -- $Revision: 1.26.6.4 $

Mapped Date : Wed Sep 21 12:01:56 2005

Design Summary

--------------

Number of errors: 0

Number of warnings: 10

Logic Utilization:

Number of Slice Flip Flops: 9,085 out of 21,504 42%

Number of 4 input LUTs: 5,931 out of 21,504 27%

Logic Distribution:

Number of occupied Slices: 6,142 out of 10,752 57%

Number of Slices containing only related logic: 6,090 out of 6,142 99%

Number of Slices containing unrelated logic: 52 out of 6,142 1%

*See NOTES below for an explanation of the effects of unrelated logic

Total Number 4 input LUTs: 7,567 out of 21,504 35%

Number used as logic: 5,931

Number used as a route-thru: 801

Number used as Shift registers: 835

Number of bonded IOBs: 552 out of 624 88%

IOB Flip Flops: 221

IOB Master Pads: 3

IOB Slave Pads: 3

Number of Block RAMs: 16 out of 56 28%

Number of MULT18X18s: 8 out of 56 14%

Number of GCLKs: 8 out of 16 50%

Number of DCMs: 2 out of 8 25%

Number of BSCANs: 1 out of 1 100%

Number of RPM macros: 21

Total equivalent gate count for design: 1,279,502

Additional JTAG gate count for IOBs: 26,496

Peak Memory Usage: 414 MB

Illustration 52: Quixote 2M Logic Utilization

AREA_GROUP AG_inst_sram0

RANGE: SLICE_X0Y107:SLICE_X7Y90

No COMPRESSION specified for AREA_GROUP AG_inst_sram0

AREA_GROUP Logic Utilization:

Number of Slice Flip Flops: 204 out of 288 70%

Logic Distribution:

Number of occupied Slices: 104 out of 144 72%

Number Slices used containing only related logic: 104 out of 104 100%

Illustration 53: Quixote Area Constraint Logic Utilization

Cypress Semiconductor Perform CY7C1372D Guide de l'utilisateur Page 65

Commentaires sur ces manuels

Cypress Semiconductor Perform CY7C1372D Guide de l'utilisateur Page 65

Commentaires sur ces manuels

Produits connexes et manuels pour Logiciel Cypress Semiconductor Perform CY7C1372D