Cypress Semiconductor FX2LP Informations techniques télécharger pdf (Page 202)

EZ-USB FX2 Technical Reference Manual

Page 10-12 EZ-USB FX2 Technical Reference Manual v2.1

10.3.1 The GPIF Registers

Two blocks of registers control the GPIF state machine:

• GPIF Configuration Registers — These registers configure the general settings and

report the status of the interface. Refer to Chapter 15, "Registers," and the remainder of

this chapter for details.

• Waveform Registers — These registers are loaded with the Waveform Descriptors that

configure the GPIF state machine; there are a total of 128 bytes located at addresses

0xE400 to 0xE47F.

It is strongly recommended that the

GPIFTool

utility be used to create

Waveform Descriptors.

GPIF transactions cannot be initiated until the Configuration Registers and Waveform Registers

are loaded by FX2 firmware.

Access to the waveform registers is only allowed while the FX2 is in GPIF mode (i.e., IFCFG1:0 =

10). The waveform registers may only be written while the GPIF engine is halted (i.e., DONE = 1).

If it’s desired to dynamically reconfigure Waveform Descriptors, this may be accomplished by writ-

ing just the bytes which change; it’s not necessary to reload the entire set of Waveform Descrip-

tors in order to modify only a few bytes.

10.3.2 Programming GPIF Waveforms

The “programs” for GPIF waveforms are the

Waveform Descriptors

, which are stored in the Wave-

form Registers by FX2 firmware.

The FX2 can hold up to four Waveform Descriptors, each of which can be used for one of four

types of transfers: Single Write, Single Read, FIFO Write, or FIFO Read. By default, one Wave-

form Descriptor is assigned to each transfer type, but it’s not necessary to retain that configuration;

all four Waveform Descriptors could, for instance, be configured for FIFO Write usage (see the

GPIFWFSELECT register in

Chapter 15 "Registers"

Each Waveform Descriptor consists of up to seven 32-bit

State Instructions

that program key tran-

sition points for GPIF interface signals. There’s a one-to-one correspondence between the State

Instructions and the GPIF state-machine States. Among other things, each State Instruction

defines the state of the CTLx outputs, the state of FD[15:0], the use of the RDYn inputs, and the

behavior of GPIFADR[8:0].

Transitions from one State to another always happen on a rising edge of the IFCLK, but the GPIF

may remain in one State for many IFCLK cycles.

10.3.2.1 The GPIF IDLE State

A Waveform consists of up to seven programmable States, numbered S0 to S6, and one special

Idle State, S7. A Waveform terminates when the GPIF program branches to its Idle State.

1 2 ... 197 198 199 200 201 202 203 204 205 206 207 ... 459 460

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